On Mon, 2015-01-12 at 08:00 +0200, Igal.Liberman wrote:
> From: Igal Liberman <igal.liber...@freescale.com>
>
> Signed-off-by: Igal Liberman <igal.liber...@freescale.com>
> Change-Id: I92d020651237041d3767aa35e9345439714f9831
> ---
> arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
Please explain this more. Was it just wrong before? Is this for a new
chip? If the latter, what effect does this have on existing chips?
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi
> index 48e0b6e..7e1f074 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi
> @@ -49,14 +49,16 @@ global-utilities@e1000 {
> reg = <0x800 0x4>;
> compatible = "fsl,qoriq-core-pll-2.0";
> clocks = <&sysclk>;
> - clock-output-names = "pll0", "pll0-div2", "pll0-div4";
> + clock-output-names = "pll0", "pll0-div2", "pll0-div3",
> + "pll0-div4";
You're changing the meaning of existing clock index 2.
-Scott
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