Hi! On Tue, May 14, 2013 at 08:59:13AM +0000, Wang Dongsheng-B40534 wrote: > I send to a wrong email address "Anton Vorontsov <avoront...@ru.mvista.com>" > > Add Anton Vorontsov <anton.voront...@linaro.org> to this email.
I don't have any means to test it, but the patch itself looks good and the description makes sense. So, Reviewed-by: Anton Vorontsov <an...@enomsg.org> Thanks! > > Thanks all. > > > -----Original Message----- > > From: Wang Dongsheng-B40534 > > Sent: Tuesday, May 14, 2013 4:06 PM > > To: avoront...@ru.mvista.com > > Cc: pau...@samba.org; r...@sisk.pl; b...@kernel.crashing.org; > > johan...@sipsolutions.net; Wood Scott-B07421; Li Yang-R58472; Zhao > > Chenhui-B35336; linuxppc-dev@lists.ozlabs.org; Wang Dongsheng-B40534 > > Subject: [PATCH] powerpc/mpc85xx: fix non-bootcpu cannot up after > > hibernation resume > > > > This problem belongs to the core synchronization issues. > > The cpu1 already updated spin_table values, but bootcore cannot get > > this value in time. > > > > After bootcpu hibiernation restore the pages. we are now running > > with the kernel data of the old kernel fully restored. if we reset > > the non-bootcpus that will be reset cache(tlb), the non-bootcpus > > will get new address(map virtual and physical address spaces). > > but bootcpu tlb cache still use boot kernel data, so we need to > > invalidate the bootcpu tlb cache make it to get new main memory data. > > > > log: > > Enabling non-boot CPUs ... > > smp_85xx_kick_cpu: timeout waiting for core 1 to reset > > smp: failed starting cpu 1 (rc -2) > > Error taking CPU1 up: -2 > > > > Signed-off-by: Wang Dongsheng <dongsheng.w...@freescale.com> > > > > diff --git a/arch/powerpc/kernel/swsusp_booke.S > > b/arch/powerpc/kernel/swsusp_booke.S > > index 11a3930..9503249 100644 > > --- a/arch/powerpc/kernel/swsusp_booke.S > > +++ b/arch/powerpc/kernel/swsusp_booke.S > > @@ -141,6 +141,19 @@ _GLOBAL(swsusp_arch_resume) > > lis r11,swsusp_save_area@h > > ori r11,r11,swsusp_save_area@l > > > > + /* > > + * The boot core get a virtual address, when the boot process, > > + * the virtual address corresponds to a physical address. After > > + * hibernation resume memory snapshots, The corresponding > > + * relationship between the virtual memory and physical memory > > + * might change again. We need to get a new page table. So we > > + * need to invalidate TLB after resume pages. > > + * > > + * Invalidations TLB Using tlbilx/tlbivax/MMUCSR0. > > + * tlbilx used here. > > + */ > > + bl _tlbil_all > > + > > lwz r4,SL_SPRG0(r11) > > mtsprg 0,r4 > > lwz r4,SL_SPRG1(r11) > > -- > > 1.8.0 > > _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
