On Mar 5, 2013, at 5:15 PM, Kumar Gala wrote: > The e6500 core used on T4240 and B4860 SoCs from FSL implements MMUv2 of > the Power Book-E Architecture. However there are some minor differences > between it and other Book-E implementations. > > Add support to parse SPRN_TLB1PS for the variable page sizes supported. > In the future this should be expanded for more page sizes supported on > e6500 as well as other MMU features. > > This patch is based on code from Scott Wood. > > Signed-off-by: Kumar Gala <ga...@kernel.crashing.org> > --- > arch/powerpc/mm/tlb_nohash.c | 18 ++++++++++++++++-- > 1 file changed, 16 insertions(+), 2 deletions(-)
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