Haren Myneni <ha...@linux.vnet.ibm.com> wrote: > [PATCH 5/6] powerpc: Macros for saving/restore PPR > > Several macros are defined for saving and restore user defined PPR value. > > Signed-off-by: Haren Myneni <ha...@us.ibm.com> > --- > arch/powerpc/include/asm/exception-64s.h | 29 +++++++++++++++++++++++++++++ > arch/powerpc/include/asm/ppc_asm.h | 25 +++++++++++++++++++++++++ > arch/powerpc/include/asm/reg.h | 1 + > 3 files changed, 55 insertions(+), 0 deletions(-) > > diff --git a/arch/powerpc/include/asm/exception-64s.h > b/arch/powerpc/include/asm/exception-64s.h > index bfd3f1f..880ef7d 100644 > --- a/arch/powerpc/include/asm/exception-64s.h > +++ b/arch/powerpc/include/asm/exception-64s.h > @@ -62,6 +62,35 @@ > #define EXC_HV H > #define EXC_STD > > +/* > + * PPR save/restore macros used in exceptions_64s.S > + * Used for P7 or later processors > + */ > +#define SAVE_PPR(area, ra, rb) > \ > +BEGIN_FTR_SECTION_NESTED(940) > \ > + ld ra,PACACURRENT(r13); \ > + ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \ > + std rb,TASKTHREADPPR(ra); \ > +END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940) > + > +#define RESTORE_PPR_PACA(area, ra) \ > +BEGIN_FTR_SECTION_NESTED(941) > \ > + ld ra,area+EX_PPR(r13); \ > + mtspr SPRN_PPR,ra; \ > +END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941) > +
Can you add some documentation here on why we should use the different versions. I'm trying to read the next patch and it's not clear to my why some have HMT_MEDIUM_NO_PPR and other times HMT_MEDIUM and others HTM_MEDIUM_HAS_PPR. Looks like HTM_MEDIUM_NO_PPR sets the priority to medium on systems where we can't save/restore the PPR, hence it can be called earlier in the exception handler before we have free GPRs. HTM_MEDIUM_HAS_PPR saves the priority on systems where it can, and then sets the priority to medium. Maybe we should change the names HTM_MEDIUM_NO_PPR => HTM_MEDIUM_PPR_DISCARD and HTM_MEDIUM_HAS_PPR => HTM_MEDIUM_PPR_SAVE But now I'm heading into bike shedding territory... plus I think I suggested the names you have currently, so I'm feeling a bit dumb now :-) Mikey > +#define HMT_MEDIUM_NO_PPR \ > +BEGIN_FTR_SECTION_NESTED(942) > \ > + HMT_MEDIUM; \ > +END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,0,942) /*non P7*/ > + > +#define HMT_MEDIUM_HAS_PPR(area, ra) \ > +BEGIN_FTR_SECTION_NESTED(943) > \ > + mfspr ra,SPRN_PPR; \ > + std ra,area+EX_PPR(r13); \ > + HMT_MEDIUM; \ > +END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,943) > + > #define __EXCEPTION_PROLOG_1(area, extra, vec) > \ > GET_PACA(r13); \ > std r9,area+EX_R9(r13); /* save r9 - r12 */ \ > diff --git a/arch/powerpc/include/asm/ppc_asm.h > b/arch/powerpc/include/asm/ppc_asm.h > index 376e36d..52649cc 100644 > --- a/arch/powerpc/include/asm/ppc_asm.h > +++ b/arch/powerpc/include/asm/ppc_asm.h > @@ -389,6 +389,31 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601) > FTR_SECTION_ELSE_NESTED(848); \ > mtocrf (FXM), RS; \ > ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_NOEXECUTE, 848) > + > +/* > + * PPR restore macros used in entry_64.S > + * Used for P7 or later processors > + */ > +#define HMT_MEDIUM_LOW_HAS_PPR > \ > +BEGIN_FTR_SECTION_NESTED(944) > \ > + HMT_MEDIUM_LOW; \ > +END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,944) > + > +#define SET_DEFAULT_THREAD_PPR(ra, rb) > \ > +BEGIN_FTR_SECTION_NESTED(945) > \ > + lis ra,0xc; /* default ppr=3 */ \ > + ld rb,PACACURRENT(r13); \ > + sldi ra,ra,32; /* 11- 13 bits are used for ppr */ \ > + std ra,TASKTHREADPPR(rb); \ > +END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,945) > + > +#define RESTORE_PPR(ra, rb) \ > +BEGIN_FTR_SECTION_NESTED(946) > \ > + ld ra,PACACURRENT(r13); \ > + ld rb,TASKTHREADPPR(ra); \ > + mtspr SPRN_PPR,rb; /* Restore PPR */ \ > +END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,946) > + > #endif > > /* > diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h > index d24c141..1723be3 100644 > --- a/arch/powerpc/include/asm/reg.h > +++ b/arch/powerpc/include/asm/reg.h > @@ -287,6 +287,7 @@ > #define SPRN_DBAT6U 0x23C /* Data BAT 6 Upper Register */ > #define SPRN_DBAT7L 0x23F /* Data BAT 7 Lower Register */ > #define SPRN_DBAT7U 0x23E /* Data BAT 7 Upper Register */ > +#define SPRN_PPR 0x380 /* SMT Thread status Register */ > > #define SPRN_DEC 0x016 /* Decrement Register */ > #define SPRN_DER 0x095 /* Debug Enable Regsiter */ > -- > 1.7.1 > > > > _______________________________________________ > Linuxppc-dev mailing list > Linuxppc-dev@lists.ozlabs.org > https://lists.ozlabs.org/listinfo/linuxppc-dev > _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
