Scott Wood wrote:
>> +/include/ "qoriq-mpic.dtsi"
>> +
>> + guts: global-utilities@e0000 {
>> + compatible = "fsl,qoriq-device-config-1.0";
>> + reg = <0xe0000 0xe00>;
>> + fsl,has-rstcr;
>> + #sleep-cells = <1>;
>> + fsl,liodn-bits = <12>;
>> + };
>> +
>> + pins: global-utilities@e0e00 {
>> + compatible = "fsl,qoriq-pin-control-1.0";
>> + reg = <0xe0e00 0x200>;
>> + #sleep-cells = <2>;
>> + };
>
> Please add fsl,p5040-device-config and fsl,p5040-pin-control. If you
> want to leave the "1.0" thing in (which was a mistake since this stuff
> doesn't seem to be versioned in any public way), double check that it's
> 100% backwards compatible with p4080.
For "fsl,qoriq-device-config-1.0", the only difference is in the LIODN
registers, since the P4080 and the P5040 have different devices. For
those devices that are the same, the LIODN registers are the same.
Is that compatible enough?
The same can be said for "fsl,qoriq-pin-control-1.0". The registers are
generally the same, except when they reference devices that are different
on the SOCs. For example, the P4080 does not have 000E_0E84 USB Polarity
Configuration Register (DCFG_USBPCR).
>> + rcpm: global-utilities@e2000 {
>> + compatible = "fsl,qoriq-rcpm-1.0";
>> + reg = <0xe2000 0x1000>;
>> + #sleep-cells = <1>;
>> + };
Same thing here. Except for a few bits for devices that don't exist on
the other SOC, they're the same.
--
Timur Tabi
Linux kernel developer at Freescale
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