From: "Aneesh Kumar K.V" <aneesh.ku...@linux.vnet.ibm.com>
ISA doc doesn't talk about this. As per ISA doc for a 4K page
tlbie RB RS
" The Abbreviated Virtual Address (AVA) field in register RB must
contain bits 14:65 of the virtual address translated by the TLB
entry to be invalidated."
That indicate we should not mask the top 16 bits. So remove the same.
Signed-off-by: Aneesh Kumar K.V <aneesh.ku...@linux.vnet.ibm.com>
---
arch/powerpc/mm/hash_native_64.c | 6 ------
1 file changed, 6 deletions(-)
diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
index b019f2d..9bf8187 100644
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -54,9 +54,6 @@ static inline void __tlbie(unsigned long vpn, int psize, int
ssize)
BUG_ON((77 - 65) > VPN_SHIFT);
va = vpn << VPN_SHIFT;
- /* clear top 16 bits, non SLS segment */
- va &= ~(0xffffULL << 48);
-
switch (psize) {
case MMU_PAGE_4K:
va |= ssize << 8;
@@ -86,9 +83,6 @@ static inline void __tlbiel(unsigned long vpn, int psize, int
ssize)
BUG_ON((77 - 65) > VPN_SHIFT);
va = vpn << VPN_SHIFT;
- /* clear top 16 bits, non SLS segment */
- va &= ~(0xffffULL << 48);
-
switch (psize) {
case MMU_PAGE_4K:
va |= ssize << 8;
--
1.7.10
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