On Mar 27, 2012, at 2:16 PM, Scott Wood wrote: > On 03/27/2012 01:44 PM, Scott Wood wrote: >> On 03/27/2012 10:21 AM, Stuart Yoder wrote: >>> On Tue, Mar 27, 2012 at 8:30 AM, Kumar Gala <ga...@kernel.crashing.org> >>> wrote: >>>> >>>> On Mar 27, 2012, at 7:15 AM, Varun Sethi wrote: >>>> >>>>> FSL MPIC supports 16 bit vectors so our vector number space isn't >>>>> restricted to 256 vectors. We should use the MPIC_LARG_VECTORS flag >>>>> while intializing the MPIC. This also prevents us from eating in to >>>>> hardware vector number space (MSIs) while setting up internal sources. >>>> >>>> What is driving this change? >>> >>> Whats driving the change is proper handling of error interrupts. Right >>> now error interrupts (muxed on int 16) are treated as a shared >>> interrupt source. We want each to be handled as a individual interrupt >>> source...thus the desire to support more than 256 interrupts. >> >> We don't actually need more than 256 interrupts for this (the individual >> error interrupts are not counted against this). But unless we change >> how vectors are allocated, we need vectors >= 256, since we have MSIs >> close enough to 256 that under the current scheme the IPIs, timers, and >> such collide with the third MSI bank. > > Note that this is the case today even without the error interrupt stuff > -- the highest vector used by MSIs on MPIC 4.1 is 0xf7, and we have 13 > special vectors (4 IPIs, 8 timers, and spurious).
This all makes sense, what I ask is that the commit message be updated to convey this. - k _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
