On Thu, 2011-11-24 at 07:49 +0000, Li Yang-R58472 wrote: > > Subject: Re: [PATCH 3/3] mtd/nand : workaround for Freescale FCM to support > > large-page Nand chip > > > > On Thu, 2011-11-24 at 08:41 +0800, b35...@freescale.com wrote: > > > + /* > > > + * Freescale FCM controller has a 2K size limitation of > > > buffer > > > + * RAM, so elbc_fcm_ctrl->buffer have to be used if > > > writesize > > > + * of chip is greater than 2048. > > > + * We malloc a large enough buffer (maximum page size is > > 16K). > > > + */ > > > + elbc_fcm_ctrl->buffer = kmalloc(1024 * 16 + 1024, > > GFP_KERNEL); > > > > Are there NANDs with 16KiB page size? > > We are not sure, but are there possibility that chip with 16K page will > appear? Or maybe we can add a MACRO for the maximum page size?
I do not know, but I know that allocating 32KiB of contiguous physical RAM may cause unneeded memory pressure and even fail if the memory is too fragmented. So I would not go for this unless this is necessary. Did you try to look how the NAND base interface could be changed to avoid re-allocation altogether, BTW? -- Best Regards, Artem Bityutskiy
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