LiuShuo a écrit : > 于 2011年08月19日 00:25, Scott Wood 写道: >> On 08/17/2011 09:33 PM, b35...@freescale.com wrote: >>> From: Liu Shuo<b35...@freescale.com> >>> >>> Freescale FCM controller has a 2K size limitation of buffer RAM. In order >>> to support the Nand flash chip whose page size is larger than 2K bytes, >>> we divide a page into multi-2K pages for MTD layer driver. In that case, >>> we force to set the page size to 2K bytes. We convert the page address of >>> MTD layer driver to a real page address in flash chips and a column index >>> in fsl_elbc driver. We can issue any column address by UA instruction of >>> elbc controller. >>> >>> NOTE: Due to there is a limitation of 'Number of Partial Program Cycles in >>> the Same Page (NOP)', the flash chip which is supported by this workaround >>> have to meet below conditions. >>> 1. page size is not greater than 4KB >>> 2. 1) if main area and spare area have independent NOPs: >>> main area NOP :>=3 >>> spare area NOP :>=2? >> How often are the NOPs split like this? >> >>> 2) if main area and spare area have a common NOP: >>> NOP :>=4 >> This depends on how the flash is used. If you treat it as a NOP1 flash >> (e.g. run ubifs rather than jffs2), then you need NOP2 for a 4K chip and >> NOP4 for an 8K chip. OTOH, if you would be making full use of NOP4 on a >> real 2K chip, you'll need NOP8 for a 4K chip. >> >> The NOP restrictions should be documented in the code itself, not just >> in the git changelog. Maybe print it to the console when this hack is >> used, along with the NOP value read from the ID. > > We can't read the NOP from the ID on any chip. Some chips don't > give this infomation.(e.g. Micron MT29F4G08BAC) Doesn't the micron chip provide it with onfi info ?
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