于 2011年08月19日 01:00, Matthieu CASTET 写道:
b35...@freescale.com a écrit :
From: Liu Shuo<b35...@freescale.com>
Freescale FCM controller has a 2K size limitation of buffer RAM. In order
to support the Nand flash chip whose page size is larger than 2K bytes,
we divide a page into multi-2K pages for MTD layer driver. In that case,
we force to set the page size to 2K bytes. We convert the page address of
MTD layer driver to a real page address in flash chips and a column index
in fsl_elbc driver. We can issue any column address by UA instruction of
elbc controller.
Why do you need to do that ?
When mtd send you a 4k page, why can't you write it by 2*2k pages write ?
1. It's easy to implement.
2. We don't need to move the data in buffer more times, because we
want to use the HW_ECC.
In flash chip per Page:
----------------------------------------------------------------
| first data | first oob | second data | second oob |
----------------------------------------------------------------
Even better send the first 2K and then if your controller allow it send the
remaining 2K without command/address phase.
The elbc controller don't allow that.
I have to send twice Program CMD for writing the whole 4KB data.
Matthieu
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