Hi.
There is a bug in the function gtm_set_ref_timer16.
When called, it correctly sets the requested timer,
but the other timer that shares the register GTCFR is reset.

The parameter 'clear' passed to macro clrsetbits_8 should not be
a bitwise complement, since the macro already complements it.

Here is a patch that should fix this issue.

--- linux-2.6.35.11/arch/powerpc/sysdev/fsl_gtm.c
+++ linux/arch/powerpc/sysdev/fsl_gtm.c
@@ -203,13 +203,10 @@
        spin_lock_irqsave(&gtm->lock, flags);
 
        /*
-        * Properly reset timers: stop, reset, set up prescalers, reference
+        * Properly set timers: stop, set up prescalers, reference
         * value and clear event register.
         */
-       clrsetbits_8(tmr->gtcfr, ~(GTCFR_STP(num) | GTCFR_RST(num)),
-                                GTCFR_STP(num) | GTCFR_RST(num));
-
-       setbits8(tmr->gtcfr, GTCFR_STP(num));
+       setbits8(tmr->gtcfr, GTCFR_STP(num) | GTCFR_RST(num));
 
        if (tmr->gtpsr)
                out_be16(tmr->gtpsr, psr);

Regards,

Jean-Denis Boyer, Eng.
Media5 Corporation - Mediatrix, M5T, Media5Boss
4229 Garlock Street, Sherbrooke (Québec), J1L 2C8, CANADA
(819)829-8749 x5241

Attachment: fsl_gtm.patch
Description: fsl_gtm.patch

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