> From: Scott Wood <scottw...@freescale.com>
> Subject: Re: MPC8313: fsl_elbc_nand and MDR
> To: "Ron Madrid" <ron_mad...@sbcglobal.net>
> Cc: linuxppc-...@ozlabs.org
> Date: Monday, April 26, 2010, 11:34 AM
> Ron Madrid wrote:
> > I am having what appears to be a little conflict
> > with this driver, particularly with the MDR.  My
> > hardware uses NAND flash and an FPGA connected
> > through the UPM.  After the kernel is up and
> > running, sometimes I cannot verify the data in
> > the UPM RAM array.  I am guessing right now that
> > this is due to a use conflict between my
> > application and the fsl_elbc_nand driver both
> > trying to use the MDR at once.
> > 
> > Is there currently any sort of coordination that
> > exists for the MDR in the fsl_elbc_nand driver?
> > I have been looking through the code and have
> > not been able to find any.
> 
> There is not yet any such coordination.  The current
> UPM code does not use MDR that I can see.

When you say current UPM code are you talking about
fsl_upm.c?  Cause that's only for a NAND device on the
UPM right?  If there's different code, I don't know
where it is.

> > Any ideas on how to solve this would be
> > appreciated as well.
> 
> Probably just add a mutex that protects the shared
> resources.

That's what I thought might need to happen.

Ron
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