I am having what appears to be a little conflict with this driver, particularly with the MDR. My hardware uses NAND flash and an FPGA connected through the UPM. After the kernel is up and running, sometimes I cannot verify the data in the UPM RAM array. I am guessing right now that this is due to a use conflict between my application and the fsl_elbc_nand driver both trying to use the MDR at once.
Is there currently any sort of coordination that exists for the MDR in the fsl_elbc_nand driver? I have been looking through the code and have not been able to find any. Any ideas on how to solve this would be appreciated as well. Ron _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
