Hi Ira:
[snip]
> I see this exact hang on a MPC8349EA board. I poll my i2c sensors every
> 500ms, and it takes around 12 hours to produce a hang. The usual hang
> has (CF | BB) set, however I have seen a hang with just BB (only once so
> far in about 2 weeks).
>
> I think the fixup should be run on 8349 as well, if not all processors.
> I'm happy to test patches. I have a way to reliably trigger a lockup,
> using another master on the i2c bus.
See my other post - hopefully a new patch is ready tomorrow/Thursday...
[snip]
> > static void mpc_i2c_fixup(struct mpc_i2c *i2c)
> > {
> > - writeccr(i2c, 0);
> > - udelay(30);
> > - writeccr(i2c, CCR_MEN);
> > - udelay(30);
> > - writeccr(i2c, CCR_MSTA | CCR_MTX);
> > - udelay(30);
> > - writeccr(i2c, CCR_MSTA | CCR_MTX | CCR_MEN);
> > - udelay(30);
> > - writeccr(i2c, CCR_MEN);
> > - udelay(30);
> > + if (i2c->real_clk == 0) {
> > + writeccr(i2c, 0);
> > + udelay(30);
> > + writeccr(i2c, CCR_MEN);
> > + udelay(30);
> > + writeccr(i2c, CCR_MSTA | CCR_MTX);
> > + udelay(30);
> > + writeccr(i2c, CCR_MSTA | CCR_MTX | CCR_MEN);
> > + udelay(30);
> > + writeccr(i2c, CCR_MEN);
> > + udelay(30);
> > + } else {
> > + int k;
> > + u32 delay_val = 1000000 / i2c->real_clk + 1;
> > +
> > + if (delay_val < 2)
> > + delay_val = 2;
> > +
> > + for (k = 9; k; k--) {
> > + writeccr(i2c, 0);
> > + writeccr(i2c, CCR_MSTA | CCR_MTX | CCR_MEN);
> > + udelay(delay_val);
> > + writeccr(i2c, CCR_MEN);
> > + udelay(delay_val << 1);
> > + }
> > + }
> > }
> >
>
> The old sequence has always un-hung the bus for me. Yours might be
> better. I'll try it next time the bus wedges up on me.
The easiest way to verify the /waveforms/ is to simply call the function
somewhere else (e.g. in a i2c write call), and then record SCK and SDA with a
scope. I saw *huge* unnecessary delays in the original code, and by some
creative interpretation of the (not very clear) 5200 data sheet I came to the
write's and delays above. If you have a scope, you might want to repeat the
test with your '8349.
Best, Albrecht.
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