On Sunday 10 January 2010 21:51:42 Benjamin Herrenschmidt wrote: > It seems that in qemu, we can see an interrupt in R3 despite the > fact that it's masked in W1. The chip doesn't actually issue an > interrupt, but we can "see" it when taking an interrupt for the > other channel. This may be a qemu bug ... or not, so let's be > safe and avoid calling into the UART layer when that happens which > woulc cause a crash. > > Signed-off-by: Benjamin Herrenschmidt <b...@kernel.crashing.org>
Acked-by: Rob Landley <r...@landley.net> Tested it, and it worked for me. Thanks, Rob -- Latency is more important than throughput. It's that simple. - Linus Torvalds _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
