On Thu, 2009-12-10 at 12:41 -0500, Josh Boyer wrote:
> On Thu, Dec 10, 2009 at 12:27:11PM -0500, Josh Boyer wrote:
> >On Thu, Dec 10, 2009 at 01:57:27PM -0200, Dave Kleikamp wrote:
> >>+static void prime_debug_regs(struct thread_struct *thread)
> >>+{
> >>+ mtspr(SPRN_IAC1, thread->iac1);
> >>+ mtspr(SPRN_IAC2, thread->iac2);
> >>+ mtspr(SPRN_IAC3, thread->iac3);
> >>+ mtspr(SPRN_IAC4, thread->iac4);
> >>+ mtspr(SPRN_DAC1, thread->dac1);
> >>+ mtspr(SPRN_DAC2, thread->dac2);
> >>+ mtspr(SPRN_DVC1, thread->dvc1);
> >>+ mtspr(SPRN_DVC2, thread->dvc2);
> >>+ mtspr(SPRN_DBCR0, thread->dbcr0);
> >>+ mtspr(SPRN_DBCR1, thread->dbcr1);
> >>+ mtspr(SPRN_DBCR2, thread->dbcr2);
> >
> >405 has no DBCR2, so I doubt setting it via mtspr would be good. Does this
> >compile for 40x and did you test it at all?
> >
> >Also, looking at the current kernel it seems SPRN_DBCR2 is only defined for
> >CONFIG_PPC_BOOK3E_64 which is also inaccurate.
>
> I mis-read the code on this part. SPRN_DBCR2 gets defined unconditionally,
> so Book-E should be fine. Still seems broken on 405 though.
Agreed. I'll rushed through the 405 stuff a bit. I'll scrutinize and
test it before I post again.
Thanks,
Shaggy
--
David Kleikamp
IBM Linux Technology Center
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