On Wed, 2009-05-20 at 19:12 +0900, Saito Hideo wrote:
> I think that the tlb should be cleared before mm->context.id is set
> MMU_NO_CONTEXT.
You are right, this definitely looks like a bug on platforms that have
HW support for the tlbil instruction (and thus care about the PID for
flushing) which afaik is only the case of recent freescale chips.
Have you verified that this change fixes your problem ?
Can you re-submit to linuxppc-dev@ozlabs.org mailing list, along with
proper changeset comment and signed-off-by: line ?
Cheers,
Ben.
> --- arch/powerpc/mm/mmu_context_nohash.c.orig 2009-03-24
> 08:12:14.000000000 +0900
> +++ arch/powerpc/mm/mmu_context_nohash.c 2009-05-20 18:33:53.000000000
> +0900
> @@ -122,22 +122,22 @@ static unsigned int steal_context_up(uns
> struct mm_struct *mm;
> int cpu = smp_processor_id();
>
> /* Pick up the victim mm */
> mm = context_mm[id];
>
> pr_debug("[%d] steal context %d from mm @%p\n", cpu, id, mm);
>
> - /* Mark this mm has having no context anymore */
> - mm->context.id = MMU_NO_CONTEXT;
> -
> /* Flush the TLB for that context */
> local_flush_tlb_mm(mm);
>
> + /* Mark this mm has having no context anymore */
> + mm->context.id = MMU_NO_CONTEXT;
> +
> /* XXX This clear should ultimately be part of local_flush_tlb_mm */
> __clear_bit(id, stale_map[cpu]);
>
> return id;
> }
>
> #ifdef DEBUG_MAP_CONSISTENCY
> static void context_check_map(void)
> --
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