For serial flash support we need to:
- Add QE Par IO Bank E device tree node, a GPIO from this bank is
used for SPI chip-select line;
- Add serial-flash node;
- Add proper module alias into of/base.c.
Signed-off-by: Anton Vorontsov <avoront...@ru.mvista.com>
---
arch/powerpc/boot/dts/mpc8569mds.dts | 26 +++++++++++++++++++++++---
drivers/of/base.c | 1 +
2 files changed, 24 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8569mds.dts
b/arch/powerpc/boot/dts/mpc8569mds.dts
index 975f2c5..e06ee92 100644
--- a/arch/powerpc/boot/dts/mpc8569mds.dts
+++ b/arch/powerpc/boot/dts/mpc8569mds.dts
@@ -260,10 +260,21 @@
};
par...@e0100 {
+ #address-cells = <1>;
+ #size-cells = <1>;
reg = <0xe0100 0x100>;
+ ranges = <0x0 0xe0100 0x100>;
device_type = "par_io";
num-ports = <7>;
+ qe_pio_e: gpio-control...@80 {
+ #gpio-cells = <2>;
+ compatible = "fsl,mpc8569-qe-pario-bank",
+ "fsl,mpc8323-qe-pario-bank";
+ reg = <0x80 0x18>;
+ gpio-controller;
+ };
+
pio1: ucc_...@01 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
@@ -369,12 +380,21 @@
};
s...@4c0 {
- cell-index = <0>;
- compatible = "fsl,spi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,mpc8569-qe-spi", "fsl,spi";
reg = <0x4c0 0x40>;
+ cell-index = <0>;
interrupts = <2>;
interrupt-parent = <&qeic>;
- mode = "cpu";
+ gpios = <&qe_pio_e 30 0>;
+ mode = "cpu-qe";
+
+ serial-fl...@0 {
+ compatible = "stm,m25p40";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+ };
};
s...@500 {
diff --git a/drivers/of/base.c b/drivers/of/base.c
index 41c5dfd..391f91c 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -447,6 +447,7 @@ struct of_modalias_table {
static struct of_modalias_table of_modalias_table[] = {
{ "fsl,mcu-mpc8349emitx", "mcu-mpc8349emitx" },
{ "mmc-spi-slot", "mmc_spi" },
+ { "stm,m25p40", "m25p80" },
};
/**
--
1.6.2.2
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