-------- Original-Nachricht --------
> Datum: Mon, 12 Jan 2009 16:08:07 +1100
> Von: Benjamin Herrenschmidt <b...@kernel.crashing.org>
> An: Scott Wood <scottw...@freescale.com>
> CC: Gerhard Pircher <gerhard_pirc...@gmx.net>, linuxppc-dev@ozlabs.org
> Betreff: Re: [PATCH 1/5] powerpc: Add platform support for AmigaOne
>
> > > + /* Flush and disable I/D cache. */
> > > + __asm__ __volatile__ ("mfspr 3, 1008" ::: "r3");
> > > + __asm__ __volatile__ ("ori 5, 5, 0xcc00" ::: "r5");
> > > + __asm__ __volatile__ ("ori 4, 3, 0xc00" ::: "r4");
> > > + __asm__ __volatile__ ("andc 5, 3, 5" ::: "r5");
> >
> > Don't do this; instead, have one multi-line asm statement (or better
> yet,
> > just use mfspr()/mtspr()/sync()/isync()).
> >
> > GCC is perfectly free to trash your registers in between statements.
>
> Also there's already some code around to properly flush & disable the
> caches on those processors.
Ouch! I searched through all assembler files in arch/powerpc/kernel/ for
such a function, but I have missed flush_disable_L1 in l2cr_6xx.S.
Thanks for the hint!
Gerhard
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