On Thu, Nov 06, 2025 at 12:36:37PM -0600, Bjorn Helgaas wrote: > L1 PM Substates and Clock PM in particular are a problem because they > depend on CLKREQ# and sometimes device-specific configuration, and none of > this is discoverable in a generic way.
According to PCIe r7.0 sec 7.5.3.7, the "Enable Clock Power Management" bit is "applicable only for Upstream Ports and with form factors that support a Clock Request (CLKREQ#) mechanism". Thus, if BIOS has set the "Enable Clock Power Management" bit on a Downstream Port, we can infer that CLKREQ# is supported. Thanks, Lukas
