On Thu, Nov 06, 2025 at 12:36:37PM -0600, Bjorn Helgaas wrote: > From: Bjorn Helgaas <[email protected]> > > We enabled ASPM too aggressively in v6.18-rc1. f3ac2ff14834 ("PCI/ASPM: > Enable all ClockPM and ASPM states for devicetree platforms") enabled ASPM > L0s, L1, and (if advertised) L1 PM Substates. > > L1 PM Substates and Clock PM in particular are a problem because they > depend on CLKREQ# and sometimes device-specific configuration, and none of > this is discoverable in a generic way. > > df5192d9bb0e ("PCI/ASPM: Enable only L0s and L1 for devicetree platforms") > (v6.18-rc3) backed off and omitted Clock PM and L1 Substates. > > L0s and L1 are generically discoverable, but some devices advertise them > even though they don't work correctly. This series is a way to avoid L0s > and L1 in that case. >
Reviewed-by: Manivannan Sadhasivam <[email protected]> Tested-by: Manivannan Sadhasivam <[email protected]> # T14s - Mani > Bjorn Helgaas (2): > PCI/ASPM: Cache Link Capabilities so quirks can override them > PCI/ASPM: Avoid L0s and L1 on Freescale Root Ports > > drivers/pci/pcie/aspm.c | 42 ++++++++++++++++++++--------------------- > drivers/pci/probe.c | 5 ++--- > drivers/pci/quirks.c | 12 ++++++++++++ > include/linux/pci.h | 1 + > 4 files changed, 36 insertions(+), 24 deletions(-) > > -- > 2.43.0 > -- மணிவண்ணன் சதாசிவம்
