Microwatt now implements ISA v3.1 (SFFS compliancy subset), including
prefixed instructions, scv/rfscv, and the FSCR, HFSCR, TAR, and CTRL
registers. The privileged mode of operation is now hypervisor mode
and there is no privileged non-hypervisor mode; the MSR[HV] bit is
forced to 1.
Besides updating the ibm,powerpc-cpu-features property to reflect the
above, this also makes the following changes relating to peripheral
devices:
- Add gpio controller.
- Remove high-speed property from SD controller, for the case where
the interface is connected through 200 ohm protection resisters.
- Put an alias for the ethernet in /chosen.
Signed-off-by: Paul Mackerras <pau...@ozlabs.org>
---
arch/powerpc/boot/dts/microwatt.dts | 73 ++++++++++++++++++++++++-----
1 file changed, 62 insertions(+), 11 deletions(-)
diff --git a/arch/powerpc/boot/dts/microwatt.dts
b/arch/powerpc/boot/dts/microwatt.dts
index 269e930b3b0b..6e575e841a7b 100644
--- a/arch/powerpc/boot/dts/microwatt.dts
+++ b/arch/powerpc/boot/dts/microwatt.dts
@@ -1,4 +1,5 @@
/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
/ {
#size-cells = <0x02>;
@@ -8,6 +9,7 @@ / {
aliases {
serial0 = &UART0;
+ ethernet = &enet0;
};
reserved-memory {
@@ -35,40 +37,79 @@ cpus {
ibm,powerpc-cpu-features {
display-name = "Microwatt";
- isa = <3000>;
+ isa = <3010>;
device_type = "cpu-features";
compatible = "ibm,powerpc-cpu-features";
mmu-radix {
isa = <3000>;
- usable-privilege = <2>;
+ usable-privilege = <6>;
+ os-support = <0>;
};
little-endian {
- isa = <2050>;
- usable-privilege = <3>;
+ isa = <0>;
+ usable-privilege = <7>;
+ os-support = <0>;
hwcap-bit-nr = <1>;
};
cache-inhibited-large-page {
- isa = <2040>;
- usable-privilege = <2>;
+ isa = <0>;
+ usable-privilege = <6>;
+ os-support = <0>;
};
fixed-point-v3 {
isa = <3000>;
- usable-privilege = <3>;
+ usable-privilege = <7>;
};
no-execute {
- isa = <2010>;
+ isa = <0x00>;
usable-privilege = <2>;
+ os-support = <0>;
};
floating-point {
+ hfscr-bit-nr = <0>;
hwcap-bit-nr = <27>;
isa = <0>;
- usable-privilege = <3>;
+ usable-privilege = <7>;
+ hv-support = <1>;
+ os-support = <0>;
+ };
+
+ prefixed-instructions {
+ hfscr-bit-nr = <13>;
+ fscr-bit-nr = <13>;
+ isa = <3010>;
+ usable-privilege = <7>;
+ os-support = <1>;
+ hv-support = <1>;
+ };
+
+ tar {
+ hfscr-bit-nr = <8>;
+ fscr-bit-nr = <8>;
+ isa = <2070>;
+ usable-privilege = <7>;
+ os-support = <1>;
+ hv-support = <1>;
+ hwcap-bit-nr = <58>;
+ };
+
+ control-register {
+ isa = <0>;
+ usable-privilege = <7>;
+ };
+
+ system-call-vectored {
+ isa = <2070>;
+ usable-privilege = <7>;
+ os-support = <1>;
+ fscr-bit-nr = <12>;
+ hwcap-bit-nr = <52>;
};
};
@@ -138,7 +179,18 @@ UART0: serial@2000 {
interrupts = <0x10 0x1>;
};
- ethernet@8020000 {
+ gpio: gpio@7000 {
+ device_type = "gpio";
+ compatible = "faraday,ftgpio010";
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x7000 0x80>;
+ interrupts = <0x14 1>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ enet0: ethernet@8020000 {
compatible = "litex,liteeth";
reg = <0x8021000 0x100
0x8020800 0x100
@@ -160,7 +212,6 @@ mmc@8040000 {
reg-names = "phy", "core", "reader", "writer", "irq";
bus-width = <4>;
interrupts = <0x13 1>;
- cap-sd-highspeed;
clocks = <&sys_clk>;
};
};
--
2.47.1
