> On 7 May 2024, at 3:22 PM, Christophe Leroy <christophe.le...@csgroup.eu>
> wrote:
>
>
>
> Le 06/05/2024 à 14:19, Athira Rajeev a écrit :
>> Add instruction tracking function "update_insn_state_powerpc" for
>> powerpc. Example sequence in powerpc:
>>
>> ld r10,264(r3)
>> mr r31,r3
>> <<after some sequence>
>> ld r9,312(r31)
>
> Your approach looks fragile.
>
> mr is a simplified instruction which in fact is "or r31, r3, r3"
>
> By the way, the compiler sometimes does it different, like below:
>
> lwz r10,264(r3)
> addi r31, r3, 312
> lwz r9, 0(r31)
>
> And what about sequences with lwzu ?
Hi Christophe,
This patch added “mr”. In next patch in same series, add instruction also is
added to instruction tracking.
I will be posting a V3 with some changes to the logic for annotating add
instructions.
Thanks
Athira
>
>>
>> Consider ithe sample is pointing to: "ld r9,312(r31)".
>> Here the memory reference is hit at "312(r31)" where 312 is the offset
>> and r31 is the source register. Previous instruction sequence shows that
>> register state of r3 is moved to r31. So to identify the data type for r31
>> access, the previous instruction ("mr") needs to be tracked and the
>> state type entry has to be updated. Current instruction tracking support
>> in perf tools infrastructure is specific to x86. Patch adds this for
>> powerpc and adds "mr" instruction to be tracked.
>>
>> Signed-off-by: Athira Rajeev <atraj...@linux.vnet.ibm.com>
