On Tue, 22 Jul 2008 22:47:58 -0300
Luis Machado <[EMAIL PROTECTED]> wrote:
> Hi,
>
> > That, or adding a small function to move the bits to the appropriate
> > registers (set_dbcr or set_dac_events).
> >
> > > Do you think it's worth to support this facility on 405's processors? If
> > > so, i'll gladly work on a solution to it.
> >
> > I would think so. There's really no difference from a userspace
> > perspective, so gdb watchpoints could be valuable there too. I'll
> > leave it up to you though.
>
> As the 440 support is ready and the 405 needs additional tweaking due to
> the use of DBCR1 instead of DBCR0 and due to a different position scheme
> of the DAC1R/DAC1W flags inside DBCR1, i'd say we should include this
> code and handle the 405 case later.
That's fine with me, but I have one question below then.
> Index: linux-2.6.26/arch/powerpc/kernel/signal.c
> ===================================================================
> --- linux-2.6.26.orig/arch/powerpc/kernel/signal.c 2008-07-20
> 16:56:57.000000000 -0700
> +++ linux-2.6.26/arch/powerpc/kernel/signal.c 2008-07-22 16:47:22.000000000
> -0700
> @@ -145,8 +145,12 @@
> * user space. The DABR will have been cleared if it
> * triggered inside the kernel.
> */
> - if (current->thread.dabr)
> + if (current->thread.dabr) {
> set_dabr(current->thread.dabr);
> +#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
> + mtspr(SPRN_DBCR0, current->thread.dbcr0);
> +#endif
Shouldn't this (and other places) be:
#if defined(CONFIG_44x) || defined(CONFIG_BOOKE)
if you are going to exclude 40x for now? Otherwise this is still
enabled on 405 and setting the wrong register.
josh
_______________________________________________
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
