On Jul 22, 2008, at 8:47 PM, Luis Machado wrote:
Hi,
That, or adding a small function to move the bits to the appropriate
registers (set_dbcr or set_dac_events).
Do you think it's worth to support this facility on 405's
processors? If
so, i'll gladly work on a solution to it.
I would think so. There's really no difference from a userspace
perspective, so gdb watchpoints could be valuable there too. I'll
leave it up to you though.
As the 440 support is ready and the 405 needs additional tweaking
due to
the use of DBCR1 instead of DBCR0 and due to a different position
scheme
of the DAC1R/DAC1W flags inside DBCR1, i'd say we should include this
code and handle the 405 case later.
We might have to handle it anyway if we're going to pursue the
hardware
breakpoint interface work in the future.
I've fixed some formatting problems. Tested on a 440 Taishan board and
on a PPC970. Both worked as they should. Ok?
I'd like to test this on some Freescale Book-e parts. Is there a gdb
patch or some user space ptrace test you have?
- k
_______________________________________________
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
