The answer is that mpic_assign_isu(mpic, 1, paddr + 0x11000) places the initial base register for isu 1 on a reserved location in the PIC register map (see *). I guess you can infer from this that no badness occurs when you write to a reserved location on the PIC.
That aside, when you walk through mpic_init(), the resulting vector placement as a result of the mpic_assign_isu() calls are consistent with the corresponding device tree. isu vector register_offset pic device_tree (storecenter.dts) 0 0 0x10200 INT0/Serial 0 0 1 0x10220 INT1/Serial 1 0 2 0x10240 INT2/Serial 2 0 3 0x10260 INT3/Serial 3 0 4 0x10280 INT4/Serial 4 0 5 0x102A0 Serial 5 0 6 0x102C0 Serial 6 0 7 0x102E0 Serial 7 0 8 0x10300 Serial 8 0 9 0x10320 Serial 9 0 10 0x10340 Serial 10 0 11 0x10360 Serial 11 0 12 0x10380 Serial 12 0 13 0x103A0 Serial 13 0 14 0x103C0 Serial 14 0 15 0x103E0 Serial 15 1 16 0x11000 Reserved* 1 17 0x11020 I2C [EMAIL PROTECTED] 1 18 0x11040 DMA 0 1 19 0x11060 DMA 1 1 20 0x11080 Reserved 1 21 0x110A0 Reserved 1 22 0x110C0 Message unit 1 23 0x110E0 Reserved 1 24 0x11100 Reserved 1 25 0x11120 DUART 1 serial0 1 26 0x11140 DUART 2 serial1 1 27 0x11160 Reserved 1 28 0x11180 Reserved 1 29 0x111A0 Reserved 1 30 0x111C0 Reserved 1 31 0x111E0 Reserved _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
