The llvm integrated assembler does not recognise the ISA 2.05 tlbiel version. Eventually do this more smartly.
Signed-off-by: Daniel Axtens <d...@axtens.net> --- arch/powerpc/mm/book3s64/hash_native.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/powerpc/mm/book3s64/hash_native.c b/arch/powerpc/mm/book3s64/hash_native.c index 52e170bd95ae..c5937f69a452 100644 --- a/arch/powerpc/mm/book3s64/hash_native.c +++ b/arch/powerpc/mm/book3s64/hash_native.c @@ -267,9 +267,14 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize) va |= ssize << 8; sllp = get_sllp_encoding(apsize); va |= sllp << 5; +#if 0 asm volatile(ASM_FTR_IFSET("tlbiel %0", "tlbiel %0,0", %1) : : "r" (va), "i" (CPU_FTR_ARCH_206) : "memory"); +#endif + asm volatile("tlbiel %0" + : : "r" (va) + : "memory"); break; default: /* We need 14 to 14 + i bits of va */ @@ -286,9 +291,14 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize) */ va |= (vpn & 0xfe); va |= 1; /* L */ +#if 0 asm volatile(ASM_FTR_IFSET("tlbiel %0", "tlbiel %0,1", %1) : : "r" (va), "i" (CPU_FTR_ARCH_206) : "memory"); +#endif + asm volatile("tlbiel %0" + : : "r" (va) + : "memory"); break; } trace_tlbie(0, 1, va, 0, 0, 0, 0); -- 2.27.0