Anton Vorontsov wrote: > Hm... this should be controlled by the PIXIS' BRDCFG0's I2CSPAN and > SERSEL bits:
Since these pins should not have changed from one kernel version to another, it doesn't explain how my device "jumped" from I2C2 to I2C1. I'm debugging this now. > 1: I2C1 and I2C2 are bridged. MPC8610 SPI functions may be used. All I2C > devices may be accessed via I2C1 controller and/or I2C2 (I2C2 depends on > SERSEL setting). I believe this is wrong. The chip documentation says that the pin controlled by I2CSPAN selects which of the two inputs to use. It does not bridge. -- Timur Tabi Linux kernel developer at Freescale _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
