Hi Andy,
On Tue, May 06, 2008 at 05:54:02PM -0500, Andy Fleming wrote:
>> Now back to the first an bigger problem :
>> currently, I have an "old" U-boot and I have written myself a dts file.
>>
>> Problem is : ethernet does not work, but that's not a mac-address problem,
>> but something else that I do not understand yet. The symptom is I get
>>
>> ip route add default via 192.168.85.33 dev eth0
>> RTNETLINK answers: Network is unreachable
>>
>> I surmise this is because my eth0 does not become up, and I surmise
>> again this is because there is no driver selected to drive the phy.
>>
>> In my arch/ppc setup this was automagically handled by [EMAIL PROTECTED]:1
>> IIRC
>>
>> Is there something I can put in my dts file to activate a driver for my
>> phy ?
>>
>> Best regards
>
> This slipped under my radar, and I'm only just now finding it again. Have
> your issues been resolved?
This has actually not been resolved as such, but we use now the newest
U-boot version which is dtb-aware, and linux-2.6.25-rc6, and that together
fixes the ethernet problem.
> If not, could you send a bit more of the boot
> log? There should be a little more if the PHY was not found. If you were
> operating with a fixed PHY setup before, then the generic PHY driver (which
> will automatically bind to your PHY) should suffice unless your MDIO bus is
> broken.
>
> Andy
Of course, the dts file also has changed, because it is now filled by
U-boot. I have attached it here for info.
Thanks
Philippe
PS:
What's the recommended way to make a powerpc patch (e.g. my defconfig) appear
in the official kernel sources ? Should I send it to linuxppc-dev@ozlabs.org,
lkml or somewhere else ?
/*
* MPC8540 ADS Device Tree Source - Modified by DEVELTECH for
MACQ_IMAGE_PROCESSOR
*
* Copyright 2006 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/ {
model = "MACQ_IMAGE_PROCESSOR";
compatible = "MPC8540ADS", "MPC85xxADS";
#address-cells = <1>;
#size-cells = <1>;
aliases {
ethernet0 = &enet0;
serial0 = &serial0;
pci0 = &pci0;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,[EMAIL PROTECTED] {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <20>; // 32 bytes
i-cache-line-size = <20>; // 32 bytes
d-cache-size = <8000>; // L1, 32K
i-cache-size = <8000>; // L1, 32K
timebase-frequency = <0>; // 33.3333 MHz, from
uboot
bus-frequency = <0>; // 166 MHz
clock-frequency = <0>; // 666, 833 or 1000 MHz, from
uboot
};
};
memory {
device_type = "memory";
reg = <00000000 10000000>; // 256M at 0x0
};
[EMAIL PROTECTED] {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
ranges = <0 e0000000 00100000>;
reg = <e0000000 00100000>; // CCSRBAR 1M
bus-frequency = <0>;
[EMAIL PROTECTED] {
compatible = "fsl,8540-memory-controller";
reg = <2000 1000>;
interrupt-parent = <&mpic>;
interrupts = <12 2>;
};
[EMAIL PROTECTED] {
compatible = "fsl,8540-l2-cache-controller";
reg = <20000 1000>;
cache-line-size = <20>; // 32 bytes
cache-size = <40000>; // L2, 256K
interrupt-parent = <&mpic>;
interrupts = <10 2>;
};
[EMAIL PROTECTED] {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <2b 2>;
interrupt-parent = <&mpic>;
dfsrr;
[EMAIL PROTECTED] {
device_type = "rtc";
compatible = "stm,m41t81";
reg = <68>;
};
[EMAIL PROTECTED] {
device_type = "temp-sensor";
compatible = "ns,lm63";
reg = <4c>;
};
[EMAIL PROTECTED] {
device_type = "temp-sensor";
compatible = "ns,lm75";
reg = <48>;
};
};
[EMAIL PROTECTED] {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-mdio";
reg = <24520 20>;
phy0: [EMAIL PROTECTED] {
interrupt-parent = <&mpic>;
interrupts = <4 1>;
reg = <1>;
device_type = "ethernet-phy";
};
};
enet0: [EMAIL PROTECTED] {
cell-index = <0>;
device_type = "network";
model = "FEC";
compatible = "gianfar";
reg = <26000 1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <29 2>;
interrupt-parent = <&mpic>;
phy-handle = <&phy0>;
};
serial0: [EMAIL PROTECTED] {
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>; // reg base, size
clock-frequency = <0>; // should we fill in in uboot?
interrupts = <2a 2>;
interrupt-parent = <&mpic>;
};
mpic: [EMAIL PROTECTED] {
clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <40000 40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
big-endian;
};
[EMAIL PROTECTED] {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
reg = <21300 4>;
ranges = <0 21100 200>;
cell-index = <0>;
[EMAIL PROTECTED] {
compatible = "fsl,mpc8540-dma-channel",
"fsl,eloplus-dma-channel";
reg = <0 80>;
cell-index = <0>;
interrupt-parent = <&mpic>;
interrupts = <14 2>;
};
[EMAIL PROTECTED] {
compatible = "fsl,mpc8540-dma-channel",
"fsl,eloplus-dma-channel";
reg = <80 80>;
cell-index = <1>;
interrupt-parent = <&mpic>;
interrupts = <15 2>;
};
[EMAIL PROTECTED] {
compatible = "fsl,mpc8540-dma-channel",
"fsl,eloplus-dma-channel";
reg = <100 80>;
cell-index = <2>;
interrupt-parent = <&mpic>;
interrupts = <16 2>;
};
[EMAIL PROTECTED] {
compatible = "fsl,mpc8540-dma-channel",
"fsl,eloplus-dma-channel";
reg = <180 80>;
cell-index = <3>;
interrupt-parent = <&mpic>;
interrupts = <17 2>;
};
};
};
pci0: [EMAIL PROTECTED] {
cell-index = <0>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x12 */
9000 0 0 1 &mpic 5 1
9000 0 0 2 &mpic 6 1
9000 0 0 3 &mpic 7 1
9000 0 0 4 &mpic 8 1>;
interrupt-parent = <&mpic>;
interrupts = <18 2>;
bus-range = <0 0>;
ranges = <02000000 0 80000000 80000000 0 20000000
01000000 0 00000000 e2000000 0 00100000>;
clock-frequency = <3f940aa>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <e0008000 1000>;
compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
device_type = "pci";
};
};
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