Hi Michael, On Wednesday 12 March 2008 01:51, Michael Ellerman wrote: > On Tue, 2008-03-11 at 11:58 +0100, Laurent Pinchart wrote: > > Hi everybody, > > > > is there any documentation describing interrupt handling for the powerpc > > architecture ? I'm writing a driver for a cascaded interrupt controller > > and the only source of information I found was the code. > > I don't think there's much documentation.
I feared so :-) > You might want to look at arch/powerpc/platforms/cell/axon_msi.c, it's a > reasonably simple example of how to setup an irq_host and so on - well I > think so :D Thanks for the pointer. > > I'm particularly interested in information about irq hosts (allocation > > and initialisation, especially the map and unmap callbacks) and irq > > chaining. Different drivers seem to implement cascaded irqs differently > > (for instance arch/powerpc/sysdev/uic.c uses setup_irq to register the > > cascaded irq handler, while arch/powerpc/platforms/82xx/pq2ads-pci-pic.c > > uses set_irq_chained_handler) so I'm a bit lost here. > > uic.c uses set_irq_chained_handler() now, so that probably answers that > question. I don't think it makes all that much difference if you set it > up by hand, but set_irq_chained_handler() is the neat way to do it. That pretty much answers my question. It's always a bit disturbing when different drivers use different APIs to accomplish the same task, especially when the lack of documentation doesn't clearly state which API should be used and which API is internal/deprecated. Thanks for your answer. Cheers, -- Laurent Pinchart CSE Semaphore Belgium Chaussée de Bruxelles, 732A B-1410 Waterloo Belgium T +32 (2) 387 42 59 F +32 (2) 387 42 75
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