Hi everybody, is there any documentation describing interrupt handling for the powerpc architecture ? I'm writing a driver for a cascaded interrupt controller and the only source of information I found was the code.
I'm particularly interested in information about irq hosts (allocation and initialisation, especially the map and unmap callbacks) and irq chaining. Different drivers seem to implement cascaded irqs differently (for instance arch/powerpc/sysdev/uic.c uses setup_irq to register the cascaded irq handler, while arch/powerpc/platforms/82xx/pq2ads-pci-pic.c uses set_irq_chained_handler) so I'm a bit lost here. Best regards, -- Laurent Pinchart CSE Semaphore Belgium Chaussée de Bruxelles, 732A B-1410 Waterloo Belgium T +32 (2) 387 42 59 F +32 (2) 387 42 75
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