Le 28/08/2018 à 15:34, Christophe LEROY a écrit :
Le 28/08/2018 à 13:09, David Gounaris a écrit :
There is a need to allow higher indexes to be
able to support MPC83xx platforms. (UCC1-UCC5)
As far as I can see, MPC8358 has 8 UCCs (ref
https://www.nxp.com/products/processors-and-microcontrollers/power-architecture-processors/powerquicc-processors/powerquicc-ii-pro/powerquicc-ii-pro-processor-with-ddr2-tdm-pci-security-usb-quicc-engine-with-1-gb-ethernet-utopia:MPC8358E)
Indeed, the code should use UCC_MAX_NUM which is defined in
include/soc/fsl/qe/ucc.h
Christophe
Christophe
Signed-off-by: David Gounaris <david.gouna...@infinera.com>
---
drivers/net/wan/fsl_ucc_hdlc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/wan/fsl_ucc_hdlc.c
b/drivers/net/wan/fsl_ucc_hdlc.c
index 5f0366a125e2..3c0e0a1d19ba 100644
--- a/drivers/net/wan/fsl_ucc_hdlc.c
+++ b/drivers/net/wan/fsl_ucc_hdlc.c
@@ -1015,7 +1015,7 @@ static int ucc_hdlc_probe(struct platform_device
*pdev)
}
ucc_num = val - 1;
- if ((ucc_num > 3) || (ucc_num < 0)) {
+ if ((ucc_num > 4) || (ucc_num < 0)) {
dev_err(&pdev->dev, ": Invalid UCC num\n");
return -EINVAL;
}
