Hello,
as far as I understand the software portal selection for a network
interface is done in
static int dpaa_eth_probe(struct platform_device *pdev)
{
[...]
channel = dpaa_get_channel();
if (channel < 0) {
dev_err(dev, "dpaa_get_channel() failed\n");
err = channel;
goto get_channel_failed;
}
priv->channel = (u16)channel;
/* Start a thread that will walk the CPUs with affine portals
* and add this pool channel to each's dequeue mask.
*/
dpaa_eth_add_channel(priv->channel);
with
static int dpaa_get_channel(void)
{
spin_lock(&rx_pool_channel_init);
if (!rx_pool_channel) {
u32 pool;
int ret;
ret = qman_alloc_pool(&pool);
if (!ret)
rx_pool_channel = pool;
}
spin_unlock(&rx_pool_channel_init);
if (!rx_pool_channel)
return -ENOMEM;
return rx_pool_channel;
}
which always returns the same pool channel (e.g. 0x401) if successful.
This means all the QMan portal_isr() are distributed round-robin to all
affine portals. Is there some way to configure the software portal for a
specific network interface, e.g. use processors 0, 1, 2, 3 for one
interface,and 4, 5, 6, 7 for another?
--
Sebastian Huber, embedded brains GmbH
Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
E-Mail : sebastian.hu...@embedded-brains.de
PGP : Public key available on request.
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