On Tue, May 30, 2017 at 09:21:39AM +1200, Chris Packham wrote:
> I'm looking at making use of the mv64x60_edac driver for the armada
> processors.
> It appears that at least the DRAM ECC error reporting is the same block from
> the old Marvell Discovery class of processors. On the ARM side I need to get
> the error interrupts exposed first before I can send my second set of changes
> for this driver but this first set is just a series of cleanups.
>
> Chris Packham (3):
> EDAC: mv64x60: check driver registration success
> EDAC: mv64x60: Fix pdata->name
> EDAC: mv64x60: replace in_le32/out_le32 with readl/writel
>
> drivers/edac/mv64x60_edac.c | 94
> +++++++++++++++++++++++----------------------
> 1 file changed, 49 insertions(+), 45 deletions(-)
All 3 applied, thanks.
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
