I'm looking at making use of the mv64x60_edac driver for the armada processors. It appears that at least the DRAM ECC error reporting is the same block from the old Marvell Discovery class of processors. On the ARM side I need to get the error interrupts exposed first before I can send my second set of changes for this driver but this first set is just a series of cleanups.
Chris Packham (3): EDAC: mv64x60: check driver registration success EDAC: mv64x60: Fix pdata->name EDAC: mv64x60: replace in_le32/out_le32 with readl/writel drivers/edac/mv64x60_edac.c | 94 +++++++++++++++++++++++---------------------- 1 file changed, 49 insertions(+), 45 deletions(-) -- 2.13.0
