Hi Kees, Thanks for the review. Please see my comments inline.
On Thu, Feb 2, 2017 at 7:51 PM, Kees Cook <keesc...@chromium.org> wrote: > On Wed, Feb 1, 2017 at 9:42 PM, Bhupesh Sharma <bhsha...@redhat.com> wrote: >> This RFC patchset tries to make the powerpc ASLR elf randomness >> implementation similar to other ARCHs (like x86). >> >> The 1st patch introduces the support of ARCH_MMAP_RND_BITS in powerpc >> mmap implementation to allow a sane balance between increased randomness >> in the mmap address of ASLR elfs and increased address space >> fragmentation. >> >> The 2nd patch increases the ELF_ET_DYN_BASE value from the current >> hardcoded value of 0x2000_0000 to something more practical, >> i.e. TASK_SIZE - PAGE_SHIFT (which makes sense especially for >> 64-bit platforms which would like to utilize more randomization >> in the load address of a PIE elf). > > I don't think you want this second patch. Moving ELF_ET_DYN_BASE to > the top of TASK_SIZE means you'll be constantly colliding with stack > and mmap randomization. 0x20000000 is way better since it randomizes > up from there towards the mmap area. > > Is there a reason to avoid the 32-bit memory range for the ELF addresses? > > -Kees I think you are right. Hmm, I think I was going by my particular use case which might not be required for generic PPC platforms. I have one doubt though - I have primarily worked on arm64 and x86 architectures and there I see there 64-bit user space applications using the 64-bit load addresses/ranges. I am not sure why PPC64 is different historically. Regards, Bhupesh
