On Mon, Jun 06, 2016 at 10:17:25PM +1000, Michael Ellerman wrote:
> On Mon, 2016-06-06 at 13:56 +0200, Peter Zijlstra wrote:
> > On Mon, Jun 06, 2016 at 09:42:20PM +1000, Michael Ellerman wrote:
> > > +static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
> > > +{
> > > + arch_spinlock_t lock_val;
> > > +
> > > + smp_mb();
> > > +
> > > + /*
> > > + * Atomically load and store back the lock value (unchanged). This
> > > + * ensures that our observation of the lock value is ordered with
> > > + * respect to other lock operations.
> > > + */
> > > + __asm__ __volatile__(
> > > +"1: " PPC_LWARX(%0, 0, %2, 0) "\n"
> > > +" stwcx. %0, 0, %2\n"
> > > +" bne- 1b\n"
> > > + : "=&r" (lock_val), "+m" (*lock)
> > > + : "r" (lock)
> > > + : "cr0", "xer");
> > > +
> > > + if (arch_spin_value_unlocked(lock_val))
> > > + goto out;
> > > +
> > > + while (!arch_spin_value_unlocked(*lock)) {
> > > + HMT_low();
> > > + if (SHARED_PROCESSOR)
> > > + __spin_yield(lock);
> > > + }
> > > + HMT_medium();
> > > +
> > > +out:
> > > + smp_mb();
> > > +}
> >
> > Why the move to in-line this implementation? It looks like a fairly big
> > function.
>
> I agree it's not pretty.
>
> I'm not beholden to v3 though if you hate it.
I don't mind; its just that I am in a similar boat with qspinlock and
chose the other option. So I just figured I'd ask :-)
_______________________________________________
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev
