On Mon, 2016-06-06 at 13:56 +0200, Peter Zijlstra wrote:
> On Mon, Jun 06, 2016 at 09:42:20PM +1000, Michael Ellerman wrote:
> > +static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
> > +{
> > + arch_spinlock_t lock_val;
> > +
> > + smp_mb();
> > +
> > + /*
> > + * Atomically load and store back the lock value (unchanged). This
> > + * ensures that our observation of the lock value is ordered with
> > + * respect to other lock operations.
> > + */
> > + __asm__ __volatile__(
> > +"1: " PPC_LWARX(%0, 0, %2, 0) "\n"
> > +" stwcx. %0, 0, %2\n"
> > +" bne- 1b\n"
> > + : "=&r" (lock_val), "+m" (*lock)
> > + : "r" (lock)
> > + : "cr0", "xer");
> > +
> > + if (arch_spin_value_unlocked(lock_val))
> > + goto out;
> > +
> > + while (!arch_spin_value_unlocked(*lock)) {
> > + HMT_low();
> > + if (SHARED_PROCESSOR)
> > + __spin_yield(lock);
> > + }
> > + HMT_medium();
> > +
> > +out:
> > + smp_mb();
> > +}
>
> Why the move to in-line this implementation? It looks like a fairly big
> function.
I agree it's not pretty.
I just didn't think having it out-of-line made it easier to understand. The
previous version had:
static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
{
...
if (!arch_spin_is_locked_sync(lock))
goto out;
Then elsewhere:
static inline bool arch_spin_is_locked_sync(arch_spinlock_t *lock)
{
...
return !arch_spin_value_unlocked(tmp);
}
So two negations and one routine called "locked" and one "unlocked", which just
didn't read well IMHO.
Another minor concern was that someone might be "clever" and call the _sync()
version manually (though hopefully we'd catch that in review).
I'm not beholden to v3 though if you hate it.
cheers
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