Hi Stefan, On 12/31/2017 9:19 PM, Stefan Wahren wrote: > Hi Grigor, > > sorry for misusing the cover letter for my comments, but i didn't received > all patches. > >> Grigor Tovmasyan <[email protected]> hat am 26. Dezember 2017 um >> 12:21 geschrieben: >> >> >> ... >> >> >> Minas Harutyunyan (5): >> usb: dwc2: Change TxFIFO and RxFIFO flushing flow > > I don't how critical this patch is, because it doesn't mention any > consequences. > > In case it's critical this patch should be in a separate patch series as Greg > mentioned. If not, i would prefer to apply "[PATCH v3 44/49] usb: dwc2: > Update bit polling functionality" before this patch so we do not need to > review code which is removed later in the series. > Thank you for feedback.
According to HSOTG databook GRSTCTL register description: bit 5: TxFFlsh R/W1S Mode: Host and Device TxFIFO Flush (TxFFlsh) This bit selectively flushes a single or all transmit FIFOs, but cannot do so If the core is in the midst of a transaction. The application must write this bit only after checking that the core is neither writing to the TxFIFO nor reading from the TxFIFO. bit 4 RxFFlsh R/W1S Mode: Host and Device RxFIFO Flush (RxFFlsh) The application can flush the entire RxFIFO using this bit, but must first ensure that the core is not in the middle of a transaction. The application must only write to this bit after checking that the controller is neither reading from the RxFIFO nor writing to the RxFIFO. Currently Rx/Tx FIFOs flushing performing in cases where no any DMA transfer (in core resetting flow or EP disabling flow). But if in some cases will require to flush FIFO's when DMA is running then it will cause problems. So, for future safety its required. Ok, we will change sequence of patches as you suggested before (44/49). > > Happy New Year > Stefan > Thanks, Minas -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
