From: Gregory Herrero <gregory.herr...@intel.com>
If an interrupt rises during hibernation process, dwc2 will assert
interrupt line to interrupt controller. If interrupt is level
sensitive, interrupt handler will be called in a loop because dwc2
will not be able to clear it while controller is hibernated.
Thus, clear all controller interrupts before hibernation entry.
Signed-off-by: Gregory Herrero <gregory.herr...@intel.com>
Signed-off-by: Mian Yousaf Kaukab <yousaf.kau...@intel.com>
---
drivers/usb/dwc2/core.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
index ff8223b..1ead3ac 100644
--- a/drivers/usb/dwc2/core.c
+++ b/drivers/usb/dwc2/core.c
@@ -398,6 +398,12 @@ int dwc2_enter_hibernation(struct dwc2_hsotg *hsotg)
}
}
+ /*
+ * Clear any pending interrupts since dwc2 will not be able to
+ * clear them after entering hibernation.
+ */
+ writel(0xffffffff, hsotg->regs + GINTSTS);
+
/* Put the controller in low power state */
pcgcctl = readl(hsotg->regs + PCGCTL);
--
2.3.3
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