Some SoC have a CFIFO register that is byte addressable. This means
when the CFIFO access is set to 32-bit, you can write 8-bit values to
addresses CFIFO+0, CFIFO+1, CFIFO+2, CFIFO+3.
Signed-off-by: Chris Brandt <chris.bra...@renesas.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda...@renesas.com>
Reviewed-by: Simon Horman <horms+rene...@verge.net.au>
---
v3:
* added reviewed-by
v2:
* options ahve moved from flags to param
---
drivers/usb/renesas_usbhs/fifo.c | 9 +++++++--
include/linux/usb/renesas_usbhs.h | 1 +
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c
index 39fa2fc1b8b7..452b456ac24e 100644
--- a/drivers/usb/renesas_usbhs/fifo.c
+++ b/drivers/usb/renesas_usbhs/fifo.c
@@ -543,8 +543,13 @@ static int usbhsf_pio_try_push(struct usbhs_pkt *pkt, int
*is_done)
}
/* the rest operation */
- for (i = 0; i < len; i++)
- iowrite8(buf[i], addr + (0x03 - (i & 0x03)));
+ if (usbhs_get_dparam(priv, cfifo_byte_addr)) {
+ for (i = 0; i < len; i++)
+ iowrite8(buf[i], addr + (i & 0x03));
+ } else {
+ for (i = 0; i < len; i++)
+ iowrite8(buf[i], addr + (0x03 - (i & 0x03)));
+ }
/*
* variable update
diff --git a/include/linux/usb/renesas_usbhs.h
b/include/linux/usb/renesas_usbhs.h
index 9097a38fcda8..87043fd21d54 100644
--- a/include/linux/usb/renesas_usbhs.h
+++ b/include/linux/usb/renesas_usbhs.h
@@ -191,6 +191,7 @@ struct renesas_usbhs_driver_param {
u32 has_usb_dmac:1; /* for USB-DMAC */
u32 runtime_pwctrl:1;
u32 has_cnen:1;
+ u32 cfifo_byte_addr:1; /* CFIFO is byte addressable */
#define USBHS_USB_DMAC_XFER_SIZE 32 /* hardcode the xfer size */
};
--
2.16.1
