Hi Hannes,

  Thank you for reviewing patches. Please find responses inline.


On 07/04/15 12:08 pm, "Hannes Reinecke" <h...@suse.de> wrote:

>On 04/02/2015 10:13 AM, Narsimhulu Musini (nmusini) wrote:
>> Hi Hannes,
>> 
>> Thank you for reviewing the patch. Please find responses inline.
>> I will incorporate the comments and suggestions in next patch submittal.
>> 
>> 
>> On 25/03/15 4:43 pm, "Hannes Reinecke" <h...@suse.de> wrote:
>> 
>>> Hi Narsimhulu,
>>>
>>> On 03/11/2015 06:01 PM, Narsimhulu Musini wrote:
>>>> These files contain low level queueing interfaces includes
>>>> hardware queues, and management of hardware features.
>>>>
>>>> v2
>>>> driver supports x86-64 arch, so removed cpu_to_XX API to maintain
>>>> consistency.
>>>>
>>>> Signed-off-by: Narsimhulu Musini <nmus...@cisco.com>
>>>> Signed-off-by: Sesidhar Baddela <sebad...@cisco.com>
>>>> ---
>>> Please find some comments below.
>>>
>[ .. ]
>>> That really looks like a 64bit structure read in as 32bit values ...
>>> If so please use 64bit values here ...
>> The structure members are aligned to hardware data, I would prefer to
>>keep
>> it same.
>> 
>I _know_ that they are aligned.
>The point of my question was whether these values are _real_ 32-bit
>values or rather 64-bit values with the top 32-bit masked off.
They are real 32 bit values. These are registers, falling on 64 bit
boundaries.
>
>Cheers,
>
>Hannes
>-- 
>Dr. Hannes Reinecke                           zSeries & Storage
>h...@suse.de                                  +49 911 74053 688
>SUSE LINUX GmbH, Maxfeldstr. 5, 90409 Nürnberg
>GF: F. Imendörffer, J. Smithard, J. Guild, D. Upmanyu, G. Norton
>HRB 21284 (AG Nürnberg)
Thanks
Narsimhulu
>

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