This patch fixes the watermark threshold of the receive FIFO for the
APM X-Gene SATA host controller driver.
Signed-off-by: Loc Ho <l...@apm.com>
Signed-off-by: Suman Tripathi <stripa...@apm.com>
---
drivers/ata/ahci_xgene.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/ata/ahci_xgene.c b/drivers/ata/ahci_xgene.c
index 77c89bf..5f0f750 100644
--- a/drivers/ata/ahci_xgene.c
+++ b/drivers/ata/ahci_xgene.c
@@ -68,6 +68,10 @@
#define PORTAXICFG_OUTTRANS_SET(dst, src) \
(((dst) & ~0x00f00000) | (((u32)(src) << 0x14) & 0x00f00000))
+#define PORTRANSCFG 0xc8
+#define PORTRANSCFG_RXWM_SET(dst, src) \
+ (((dst) & ~0x0000007f) | (((u32) (src) << 0) & 0x0000007f))
+
/* SATA host controller AXI CSR */
#define INT_SLV_TMOMASK 0x00000010
@@ -176,6 +180,10 @@ static void xgene_ahci_set_phy_cfg(struct
xgene_ahci_context *ctx, int channel)
val = PORTAXICFG_OUTTRANS_SET(val, 0xe); /* Set outstanding */
writel(val, mmio + PORTAXICFG);
readl(mmio + PORTAXICFG); /* Force a barrier */
+ /* Set the watermark threshold of the receive FIFO */
+ val = readl(mmio + PORTRANSCFG);
+ val = PORTRANSCFG_RXWM_SET(val, 0x30);
+ writel(val, mmio + PORTRANSCFG);
}
/**
--
1.8.2.1
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