This patch fixes the SATA PHY clock DTS node csr-mask of the SATA
Host controller 1.
Signed-off-by: Loc Ho <l...@apm.com>
Signed-off-by: Suman Tripathi <stripa...@apm.com>
---
arch/arm64/boot/dts/apm-storm.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/apm-storm.dtsi
b/arch/arm64/boot/dts/apm-storm.dtsi
index f8c40a6..df5896d 100644
--- a/arch/arm64/boot/dts/apm-storm.dtsi
+++ b/arch/arm64/boot/dts/apm-storm.dtsi
@@ -186,7 +186,7 @@
clock-output-names = "sataphy1clk";
status = "disabled";
csr-offset = <0x4>;
- csr-mask = <0x00>;
+ csr-mask = <0x3a>;
enable-offset = <0x0>;
enable-mask = <0x06>;
};
--
1.8.2.1
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