On Fri, Oct 16, 2015 at 10:28:11AM -0700, Paul E. McKenney wrote: > In other words, if task2() acquires the lock after task1() releases it, > all CPUs must agree on the order of the operations in the two critical > sections, even if these other CPUs don't acquire the lock. > > This same guarantee is needed if task1() and then task2() run in > succession on the same CPU with no additional synchronization of any sort. > > Does this work on arm64?
Yes, their load-acquire and store-release are RCsc. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
