On Sat, Oct 03, 2015 at 12:37:35AM +0300, Denis Kirjanov wrote: > >> -0: tlbie r4; \ > >> +0: tlbie r4, 0; \ > > > > This isn't correct. With POWER7 and later (which this compile > > is, since it's on LE), the tlbie instruction takes two register > > operands: > > > > tlbie RB, RS > > > > The tlbie instruction on pre POWER7 cpus had one required register > > operand (RB) and an optional second L operand, where if you omitted > > it, it was the same as using "0": > > > > tlbie RB, L > > > > This is a POWER7 and later build, so your change which adds the "0" > > above is really adding r0 for RS. The new tlbie instruction doesn't > > treat r0 specially, so you'll be using whatever random bits which > > happen to be in r0 which I don't think that is what you want. > > Ok, than we can just zero out r5 for example and use it in tlbie as RS, > right?
That won't assemble _unless_ your assembler is in POWER7 mode. It also won't do the right thing at run time on older machines. Where is this tlbia macro used at all, for 64-bit machines? Segher -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
