Most Rockchip SoCs have a DesignWare HS OTG USB 2.0 controller, enable the driver for the Rockchip USB 2.0 PHY to make that functional.
Signed-off-by: Sjoerd Simons <sjoerd.sim...@collabora.co.uk> --- Changes in v2: - Only enable the USB 2 phy, not the controller as that came in through another tree - Enable USB 2.0 phy as a module as the controller is a module as well arch/arm/configs/multi_v7_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index 660e72a..2ce0d63 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -662,6 +662,7 @@ CONFIG_PHY_HIX5HD2_SATA=y CONFIG_PWM_STI=m CONFIG_OMAP_USB2=y CONFIG_TI_PIPE3=y +CONFIG_PHY_ROCKCHIP_USB=m CONFIG_PHY_MIPHY28LP=y CONFIG_PHY_MIPHY365X=y CONFIG_PHY_RCAR_GEN2=m -- 2.5.3 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
