> -----Original Message----- > From: pku....@gmail.com [mailto:pku....@gmail.com] On Behalf Of Li Yang > Sent: Thursday, September 10, 2015 7:19 AM > To: Tang Yuantian-B29983 <yuantian.t...@freescale.com> > Cc: Hans de Goede <hdego...@redhat.com>; t...@kernel.org; linux- > i...@vger.kernel.org; lkml <linux-kernel@vger.kernel.org>; > devicet...@vger.kernel.org > Subject: Re: [PATCH 2/3] devicetree:bindings: add devicetree bindings for > Freescale AHCI > > On Mon, Sep 7, 2015 at 3:23 AM, <yuantian.t...@freescale.com> wrote: > > From: Tang Yuantian <yuantian.t...@freescale.com> > > > > adds bindings for Freescale QorIQ AHCI SATA controller. > > > > Signed-off-by: Tang Yuantian <yuantian.t...@freescale.com> > > --- > > .../devicetree/bindings/ata/ahci-fsl-qoriq.txt | 21 > +++++++++++++++++++++ > > 1 file changed, 21 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/ata/ahci-fsl- > qoriq.txt > > > > diff --git a/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt > b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt > > new file mode 100644 > > index 0000000..b614e3b > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt > > @@ -0,0 +1,21 @@ > > +Binding for Freescale QorIQ AHCI SATA Controller > > + > > +Required properties: > > + - reg: Physical base address and size of the controller's register area. > > + - compatible: Compatibility string. Must be 'fsl,<chip>-ahci', where > > + chip could be ls1021a, ls2085a, ls1043a etc. > > + - clocks: Input clock specifier. Refer to common clock bindings. > > + - interrupts: Interrupt specifier. Refer to interrupt binding. > > + > > +Optional properties: > > + - dma-coherent: Enable ACHI coherency DMA operation. > > + - reg-names: register area names when there are more then 1 regster > area. > > A few typos here: > s/ACHI/AHCI/ > s/coherency/coherent/ > s/then/than/ > s/regster/register/ > Can't believe there is so many typos. Will fixed in follow-up patch.
Thanks, Yuantian > Regards, > Leo
