We're removing struct clk from the clk provider API, so switch
this code to using the clk_hw based provider APIs.

Cc: Barry Song <baohua.s...@csr.com>
Signed-off-by: Stephen Boyd <sb...@codeaurora.org>
---
 drivers/clk/sirf/clk-common.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/clk/sirf/clk-common.c b/drivers/clk/sirf/clk-common.c
index 2f64d4beeb52..77e1e2491689 100644
--- a/drivers/clk/sirf/clk-common.c
+++ b/drivers/clk/sirf/clk-common.c
@@ -167,10 +167,10 @@ static long cpu_clk_round_rate(struct clk_hw *hw, 
unsigned long rate,
         * SiRF SoC has not cpu clock control,
         * So bypass to it's parent pll.
         */
-       struct clk *parent_clk = clk_get_parent(hw->clk);
-       struct clk *pll_parent_clk = clk_get_parent(parent_clk);
-       unsigned long pll_parent_rate = clk_get_rate(pll_parent_clk);
-       return pll_clk_round_rate(__clk_get_hw(parent_clk), rate, 
&pll_parent_rate);
+       struct clk_hw *parent_clk = clk_hw_get_parent(hw);
+       struct clk_hw *pll_parent_clk = clk_hw_get_parent(parent_clk);
+       unsigned long pll_parent_rate = clk_hw_get_rate(pll_parent_clk);
+       return pll_clk_round_rate(parent_clk, rate, &pll_parent_rate);
 }
 
 static unsigned long cpu_clk_recalc_rate(struct clk_hw *hw,
@@ -180,8 +180,8 @@ static unsigned long cpu_clk_recalc_rate(struct clk_hw *hw,
         * SiRF SoC has not cpu clock control,
         * So return the parent pll rate.
         */
-       struct clk *parent_clk = clk_get_parent(hw->clk);
-       return __clk_get_rate(parent_clk);
+       struct clk_hw *parent_clk = clk_hw_get_parent(hw);
+       return clk_hw_get_rate(parent_clk);
 }
 
 static struct clk_ops std_pll_ops = {
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

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