On 06/15/2015 02:30 PM, Linus Torvalds wrote:
>
> On Jun 12, 2015 2:09 PM, "Andy Lutomirski" <l...@amacapital.net
> <mailto:l...@amacapital.net>> wrote:
>>
>> Caveat emptor: it also disables SMP.
>
> OK, I don't think it's interesting in that form.
>
> For small cpu counts, I guess we could have per-cpu syscall entry points
> (unless the syscall entry msr is shared across hyperthreading? Some
> msr's are per thread, others per core, AFAIK), and it could actually
> work that way.
>
> But I'm not sure the three cycles is worth the worry and the complexity.
>
We discussed the per-cpu syscall entry point, and the issue at hand is
that it is very hard to do that without with fairly high probability
touch another cache line and quite possibly another page (and hence a
TLB entry.)
-hpa
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